Workshops and Tutorials at PACT 2026

SODA Synthesizer: Accelerating Artificial Intelligence Applications with an End-to-End Silicon Compiler

Scheduling: Monday, October 19 (morning)

Tutorial Presenters:

Nicolas Bohm Agostini, Pacific Northwest National Laboratory
Vito Giovanni Castellana, Pacific Northwest National Laboratory
Fabrizio Ferrandi, Politecnico di Milano
Serena Curzel, Politecnico di Milano
Ankur Limaye, Pacific Northwest National Laboratory
Antonino Tumeo, Pacific Northwest National Laboratory

Abstract

Artificial intelligence (AI) applications, including machine learning, graph analytics, scientific AI, and data-intensive workloads, continue to drive demand for specialized hardware accelerators targeting field-programmable gate arrays (FPGAs), chiplet-based systems, and application-specific integrated circuits (ASICs). At the same time, the rapid evolution of AI models and workloads is increasingly incompatible with conventional hardware design methodologies, which rely on long development cycles and extensive manual optimization. Emerging AI systems require agile hardware development flows capable of rapidly translating high-level software descriptions into optimized hardware implementations while enabling design-space exploration across performance, power, area, and programmability objectives. This tutorial presents the SOftware Defined Accelerators (SODA) Synthesizer, an open-source end-to-end compiler and synthesis framework for agile hardware generation. SODA combines modern compiler infrastructures, intermediate representations, and high-level synthesis (HLS) technologies to enable rapid accelerator development directly from productive programming environments. The tutorial will discuss methodologies, trends, opportunities, and open challenges in compiler-driven hardware generation, with a particular emphasis on AI and data-centric applications, heterogeneous systems, and open-source hardware ecosystems. The tutorial will provide a hands-on experience with the SODA toolchain, composed of SODA-OPT, an MLIR-based frontend and optimization framework interfacing with Python-based data science and AI workflows, and Bambu, an advanced open-source HLS framework capable of generating optimized RTL accelerators for FPGA and ASIC targets. Participants will explore the complete hardware generation flow, from high-level algorithm descriptions to synthesized hardware implementations, including compiler optimizations, hardware-aware transformations, and accelerator design-space exploration.

The tutorial will additionally discuss emerging directions in AI-assisted electronic design automation (EDA), physically aware HLS, open-source silicon ecosystems, and agile hardware/software co-design for next-generation AI infrastructures. By combining compiler technologies, open-source synthesis frameworks, and practical accelerator design methodologies, the tutorial aims to provide researchers and practitioners with the foundations needed to develop scalable and adaptable AI hardware systems.